1. Field of the Invention
The present invention generally relates to a semiconductor manufacturing process. More particularly, the present invention relates to a method of forming a shallow trench isolation structure and the structure thereof.
2. Description of the Prior Art
Shallow trench isolation (STI) technique has been developed to avoid a bird's beak encroachment of a local oxidation of silicon (LOCOS) technique. The shallow trench isolation structure has been widely used to provide effective isolation for fabricating semiconductor devices with sub-micron or less critical dimension.
For a conventional STI process, a pad oxide layer is formed on a substrate and then a silicon nitride layer is formed on the pad oxide layer. After forming a patterned photoresist layer to define the STI region, the silicon nitride layer, the pad oxide layer and the substrate are sequentially etched to form trenches in the substrate. A silicon oxide layer is deposited over the substrate to fill the trench and followed by a planarization process to form STI structures.
However, divots or oxide loss can easily occur near the top corners of the STI structure during the subsequent etching and cleaning process steps. Charges may accumulate at the divot and result in a sub-threshold leakage current of the device in the integrated circuits. The divot or oxide loss problem becomes more serious for an embedded memory process such as embedded flash (e-flash) process due to extra etching and cleaning process steps compared to a typical logic process.